LIN 2.2, 2.1 and 1.3 Protocol Controller IP

Overview

The LIN is a soft core of the Local Interconnect Network (LIN). This interface is a serial communication protocol, designed primarily to be used in automotive applications. Compared to CAN, LIN is slower, but thanks to its simplicity, is much more cost effective. Our Core is ideal for a communication in intelligent sensors and actuators, where the bandwidth and versatility of CAN is not required. The LIN core provides an interface between a microprocessor/microcontroller and a LIN bus. It can work as master or slave LIN node, depending on a work mode, determined by the microprocessor/microcontroller. Our controller supports transmission speed between 1 and 20kb/s, which allows it to transmit and receive LIN messages compatible to LIN 1.3. LIN 2.1 and the newest 2.2. The reported information status includes the type and condition of transfer operations being performed by the LIN, as well as a wide range of LIN error conditions (overrun, framing, parity, timeout). Our Core includes programmable timer, which allows to detect timeout and synchronization error. The LIN is described at RTL level, empowering the target use in FPGA and ASIC technologies.

Key Features

  • Conforms with LIN 1.2, LIN 2.1 and LIN 2.2 specification.
  • Automatic LIN Header handling
  • Automatic Re-synchronization
  • Data rate between 1Kbit/s and 20 Kbit/s
  • Master and Slave work mode
  • Time-out detection
  • Extended error detection
  • “Break-in-data” support
  • Available system interface wrappers:
  • AMBA - APB Bus
  • Altera Avalon Bus
  • Xilinx OPB Bus

Block Diagram

LIN 2.2, 2.1 and 1.3 Protocol Controller IP Block Diagram

Applications

  • Automotive
  • Industrial
  • Embedded communication systems

Deliverables

  • Source code:
  • VHDL Source Code or/and
  • VERILOG Source Code or/and
  • Encrypted, or plain text EDIF
  • VHDL & VERILOG test bench environment
  • Active-HDL automatic simulation macros
  • ModelSim automatic simulation macros
  • Tests with reference responses
  • Technical documentation
  • Installation notes
  • HDL core specification
  • Datasheet
  • Synthesis scripts
  • Example application
  • Technical support

Technical Specifications

Maturity
In Production
Availability
Immediate
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Semiconductor IP