Library of LVDS IOs cells for TSMC 65GP
Overview
The nSIO2000_TS65GP_2V5_1V0 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/1.0V or 1.8V/1.0V, designed on the TSMC 65 GP technology. The library is composed according to the customer’s choice of cells.
Key Features
- TSMC 65 GP
- 2.5V/1.0V IO/Core transistors
- Fully compliant with TIA/EIA-644-A-2001
- Multi-purpose reconfigurable IO
- Point-to-point, point-to-multipoint or bus-based IC high-speed data communications
- Intra-package (e.g. MCM or SIP) inter-die high-speed data communications
- Backplane high-speed data communications
- High-speed serial communications (HDMI, SATA, PCIeX, etc.)
- Communication to LCD/OLED screens
- Video sensor digital data interface
Deliverables
- GDS II layouts
- LEF abstracts
- CDL netlists
- Liberty timings
- Verilog description
- A full datasheet
- An integration note
Technical Specifications
Foundry, Node
TSMC 65 GP
Maturity
Silicon proven
TSMC
Silicon Proven:
65nm
GP