JPEG Decoder 1-pixel/clock

Overview

- Baseline JPEG encoder/decoder described in RTL compliant with ISO/IEC 10918-1

- High speed processing with low clock frequency

- Suitable for digital still camera .printer,facsimile and surveillance camera system

- 3 types of IPs are available.
Pixel/clock@4:2:2: 1, Performance (4K2K-fps@100MHz) 12.5 fps
Pixel/clock@4:2:2: 4, Performance (4K2K-fps@100MHz) 50 fps
Pixel/clock@4:2:2: 8, Performance (4K2K-fps@100MHz) 100 fps

Key Features

- Image Format: Frame sequential method
- Input/Output Format: YUV 4:4:4/4:2:2/4:2:0/4:0:0
- Data bus protcol: AXI
- CPU bus protcol: AHB
- Error detection during decoding illegal stream
- Tables

(encode) Quantization table:2(Programmable)

Huffman table :4(*Programmable)
*:option only of 1pixle/clock

(decode) Quantization table:4

Huffman table :4

- Scaling function of Quantization table
- SOI,DHT,DQT,DRI,SOF0,SOS,RSTm,EOI

Benefits

TMC's DMNA (Digital Media New Algorithm), our original mathematical algorithm, drastically reduces the total amounts of calculations & operations, and realizes high-speed processing, high-quality image output, and low power consumption.

Applications

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Deliverables

Encrypted RTL
Datasheets
Verification environment
Synthesis constraint
Bit accurate model

Technical Specifications

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