High Quality LC-PLLs

Overview

Silicon Creations provides precise, ultra-low jitter LC-tank based PLLs for demanding applications such as AFE, Converter, high-end PHY and RF clocking. Our LC-PLL portfolio includes:

Advanced Fractional-N LC-PLLs with all digital architecture supporting an LC-Tank are proven in 7nm FinFET and commencing production. These IPs are low power (below 10mW), small (below 0.1mm2) and can provide broadband jitter comfortably below 300fs RMS.
28nm Fractional-N synthesizers in production in TSMC, UMC and SMIC with generated LTJ below 500fs RMS broadband and below 150fs RMS integrated above 1MHz.

Key Features

Wideband integrated jitter <400fs in integer mode, <800fs in fractional mode with high-speed / clean reference with active fractional noise cancellation
Passes PCIe6 reference clock requirements with wide margin
Reference spur <200fs RMS
Random period jitter <30fs RMS
Low-leakage standby mode for fast re-locking
- “Instant” frequency lock from standby
- < 0.1% frequency error over PVT for open-loop DCO
±8% frequency tuning range
Programmable loop bandwidth

Benefits

Saves power and system cost:
Replaces expensive (>$10) external jitter cleaner PLL chips requiring off-chip differential buffers and receivers with silicon area costing just a few cents.
Reduces risk.

Block Diagram

Applications

Clock de-spreading for Video format converters.
Jitter cleaning for Synchronous Ethernet and Gapped Clock cleaning in OTU systems

Deliverables

Synthesizable RTL (Verilog)
Timing constraints
Documentation
Comprehensive support

Technical Specifications

Foundry, Node

Any

Maturity

Silicon Proven

Availability

Now

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