The MVD ISDB-T core is a drop-in module that includes the following functions :
• Input data framer from DVB-SPI source (MPEG-TS flow)
• ISDB-T modulator (Reed-Solomon encoder, Energy dispersal, Convolutional interleaver, FEC convolution encoder, QAM symbol mapper, Time & Frequency Interleaver, IFFT)
• Low Pass Filter
• Output for complex DAC (2 x 16 bits)
The MVD ISDB-T modulator core is delivered for baseband output to be natively connected to AD9789 DAC from Analog Devices but can be used in Intermediate Frequency application (for Analog Devices (AD9744)) or in RF application when respectively connected to our UPSAMPLER or our UPCONVERTER core (for Analog Devices (AD9739A) or Maxim RF DACs (MAX5881)).
ISDB-T Modulator
Overview
Key Features
- ARIB STD-B31 compliant operation, supporting one, two or three-layers
- Drop-in module for Spartan-6™, Virtex-6™, Artix-7™, Kintex-7™, Virtex-7™ FPGAs and Zynq™
- Single clock (up to 160 MHz)
- Single external memory (DDR memory)
- Robust SPI input (discarding incorrect input packets)
- PCR re-stamping
- Configurable Convolutional Rate
- Programmable DQPSK, QPSK, 16-QAM and 64-QAM Symbol Mapping
- Configurable support for 2k, 4k and 8k OFDM modes (modes 1, 2 & 3)
- Programmable Guard Interval (1/4, 1/8, 1/16, 1/32)
- Supports variable channel width 6MHz to 8MHz
- Full 13-segment ISDB-T modulator
- Complex baseband outputs (2 x 16 bits) @ Fsymbol rate
- Fully synthesizable RTL VHDL design (not delivered) for easy customization
- Design delivered as Netlist
- MER > 42dB
Block Diagram
Applications
- ISDB-T may be used in applications related to terrestrial transmission, typically at the head end.
Deliverables
- Datasheet
- Netlist for core generation
- VHDL top file
- VHDL source code: can be delivered as an option under NDA and other specific clauses
Technical Specifications
Availability
June 2016