Triple Speed Ethernet
Triple-Speed Ethernet Intel® FPGA intellectual property (IP) supports the 10 Mbps, 100 Mbps, and 1 Gbps data rates on all Intel® FPGA families. This IP is offered in MAC-only (to connect to external PHY chips) or MAC+PHY mode using SGMII protocol.
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Product Name |
Supported Device Families |
|---|---|
|
Triple-Speed Ethernet Intel® FPGA IP |
Agilex™ 5 devices, Agilex™ 7 (E-tile and F-tile), Arria® II, Arria® V, Arria® 10, Cyclone® IV, Cyclone® V, Cyclone® 10 GX, Cyclone® 10 LP, MAX® 10, Stratix® IV, Stratix® V, Stratix® 10 (E-tile), Stratix® 10 (L-tile and H-tile) |
10G Ethernet
The Intel® FPGA IP for 10G Ethernet IP portfolio contains various IP types to support data rates from 1G to 10G.
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Product Name |
Supported Devices |
|---|---|
| GTS Ethernet FPGA Hard IP | Agilex™ 5 devices |
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Backplane Ethernet 10GBASE-KR PHY Intel® FPGA IP |
Arria® V GZ, Arria® 10 GT, Arria® 10 GX, Arria® 10 SX, Stratix® IV GT, Stratix® V E, Stratix® V GS, Stratix® V GT, Stratix® V GX, Stratix® 10 GX, Stratix® 10 MX, Stratix® 10 SX, Stratix® 10 TX |
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10GBASE-R PHY Intel® FPGA IP |
Arria® V GT, Arria® V ST, Arria® V GZ, Arria® 10 GT, Arria® 10 GX, Arria® 10 SX, Cyclone® 10 GX, Stratix® IV GT, Stratix® V GX, Stratix® V GT, Stratix® 10 GX, Stratix® 10 MX, Stratix® 10 SX, Stratix® 10 TX |
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1G/10Gb Ethernet PHY Intel® FPGA IP |
Arria® V GZ, Arria® V ST, Arria® 10 GT, Arria® 10 GX, Arria® 10 SX, Stratix® V E, Stratix® V GS, Stratix® V GT, Stratix® V GX |
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Multi-Rate Ethernet PHY Intel® FPGA IP |
Agilex™ 5 devices, Agilex™ 7 devices, Arria® V GT, Arria® V GX, Arria® V SX, Arria® V ST, Arria® 10 GT, Arria® 10 GX, Arria® 10 SX, Cyclone Series, Cyclone® 10 GX, Cyclone® 10 LP, Stratix® 10 devices |
25G Ethernet
When a single 10G is not enough bandwidth, the two most obvious paths are to use multiple 10G channels or increase the data rate to 25G.
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Product Name |
Supported Devices |
|---|---|
| GTS Ethernet FPGA Hard IP | Agilex™ 5 devices |
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25G Ethernet Intel® FPGA IP |
Arria® 10 GT, Stratix® 10 GX, Stratix® 10 MX |
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Agilex™ 7 F-Tile Ethernet Hard IP |
Agilex™ 7 devices |
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Agilex™ 7 and Stratix® 10 FPGA E-Tile Hard IP |
Agilex™ 7 FPGA F-series, Stratix® 10 MX, Stratix® 10 TX |
40G Ethernet
The Intel® FPGA IP for 40G Ethernet IP core implements the MAC and PHY function using 4x10G lanes with KR4 and CR4 support for backplane connectivity as well as IEEE 1588v2 support for high-accuracy time synchronization.
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Product Name |
Supported Devices |
|---|---|
|
40 Gbps Ethernet MAC and PHY |
Arria® V GZ, Arria® 10 GT, Arria® 10 GX, Arria® 10 SX, Stratix® IV GT, Stratix® V E, Stratix® V GS, Stratix® V GT, Stratix® V GX, Stratix® 10 GX, Stratix® 10 MX, Stratix® 10 SX |
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Low Latency E-Tile 40G Ethernet Intel® FPGA IP |
Agilex™ 5 devices, Agilex™ 7 devices, Stratix® 10 devices |
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Agilex™ 7 F-Tile Ethernet Hard IP |
Agilex™ 7 devices |
50G Ethernet
The Intel® FPGA IP for 50GE has a flexible design to support 4x12.5G or 2x25G PCS modes.
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Product Name |
Supported Devices |
|---|---|
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50G Ethernet Intel® FPGA IP |
Arria® 10 GT |
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Stratix® 10 FPGA H-Tile Hard IP for Ethernet Intel® FPGA IP |
Stratix® 10 GX, Stratix® 10 MX, Stratix® 10 SX, Stratix® 10 TX |
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Low Latency 50G Ethernet IP |
Stratix® 10 devices |
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Agilex™ 7 and Stratix® 10 FPGA E-Tile Hard IP |
Agilex™ 7 devices, Stratix® 10 devices |
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Agilex™ 7 F-tile Ethernet Hard IP |
Agilex™ 7 devices |
100G Ethernet
The latest in Ethernet protocols to be widely adopted is the 100G protocol. The 100G IP leverages multiple channels at either 10G or 25G. Intel offers 100G Ethernet for CAUI and CAUI-4 with backplane support and time synchronization with IEEE 1588v2 support.
| Product Name | Supported Devices |
|---|---|
|
100G Ethernet Intel® FPGA IP |
Arria® V GZ, Arria® 10 GT, Arria® 10 GX, Arria® 10 SX, Stratix® IV GT, Stratix® V GS, Stratix® V GT, Stratix® V GX |
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Agilex™ 7 F-Tile Ethernet Hard IP |
Agilex™ 7 devices |
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Agilex™ 7 and Stratix® 10 FPGA E-Tile Hard IP |
Agilex™ 7 devices, Stratix® 10 MX, Stratix® 10 TX |
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Stratix® 10 FPGA H-Tile Hard IP for Ethernet Intel® FPGA IP |
Stratix® 10 GX, Stratix® 10 MX, Stratix® 10 SX, Stratix® 10 TX |
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Low Latency Ethernet 100G MAC and PHY Intel® FPGA IP |
Arria® V GZ, Arria® 10 GT, Arria® 10 GX, Stratix® IV GT, Stratix® V GS, Stratix® V GT, Stratix® V GX, Stratix® 10 GX, Stratix® 10 MX, Stratix® 10 SX |
400G and beyond
Intel has demonstrated 400G Ethernet capability since 2013, well ahead of the industry. The configurable 400GE Hard IP on Agilex™ 7 FPGAs I-Series provide you with performance and power advantages for your applications using Ethernet at these data rates.
Intel has demonstrated running 800G Ethernet running on a single Agilex™ 7 FPGA I-series with 2 F-tiles at OFC 2022.
Watch this demo video of 400GE traffic running between two Agilex™ 7 FPGAs I-Series ›
| Product Name | Supported Devices |
|---|---|
|
Agilex™ 7 F-Tile Ethernet Hard IP |
Agilex™ 7 devices |
Ethernet IP Subsystem
The Ethernet IP Subsystem allows users to easily configure complex subsystems with a simple-to-use menu-driven user interface. This reduces the frustration of configuring multiple ports with different requirements. Customers can create example designs, simulate the configuration, and run these designs on supported development kits or their hardware.