HSR-PRP Switch

Overview

HSR-PRP Switch (HPS) is an IP Core for the implementation of High-availability Seamless Redundancy and Parallel Redundancy Protocol (HSR and PRP version 3, IEC 62439-3-Clause 5 and 4 respectively) standards for Reliable Ethernet communications. HSR-PRP Switch is a full hardware solution that can be implemented on a low-cost FPGA.

It is a flexible solution for the Energy Market Equipment that will be connected to HSR rings, PRP Lans or will work as Network bridges in the context of IEC 61850.

Key Features

  • Fast Ethernet (100Mb) and Gigabit (1GB) versions available
  • It switches frames by hardware. This feature offers high switching speeds, needed to fulfill the Maximum Allowed Age and Data Integrity set for Process Bus and Inter-bay Bus in Electric Substation Automation
  • The processing architecture has been designed specifically for HSR/PRP. Forwarding latencies in range of 500ns for Gigabit Ethernet
  • It is an all-hardware. There is no need for on-chip microprocessor nor software stack
  • It has been optimized to require few logic resources in order to allow the implementation on low-cost FPGA devices
  • It supports IEEE 1588-2008 V2 combined with SoC-e 1588 IP cores
  • It can be used to implement End-Node DAN, RedBox or QuadBox functionalities
  • It has been provided with a single flag that switches between PRP and HSR modes
  • It includes complete statistics and error registers for each port integrated (Network Supervision)
  • Supported HSR modes: H, N, T, U
  • Supported PRP modes: Duplicates Discard, Duplicates Accept
  • VLAN support and HSR Rings id
  • Evaluation Designs for Spartan-6 and Zynq devices
  • SMNP and MIB Table available
  • Configuration-over-Ethernet (COE): Full access to internal registers through the same Ethernet link that connects to the CPU
  • Dynamic Bitstream Configuration: Allows changing remotely the functionality of the FPGA
  • HSR-PRP Switch IP core customizable features for optimum resources/functionalities trade off:
    • Node Table size
    • Forwarding Queues size independent for each port
    • 1588 Transparent Clock in Redundant and Interlink Ports
    • Scalable duplicate/circulate discard table
    • VLAN Priority support
    • Access to internal registers via MDIO or UART
    • RedBox mode with integrated SAN proxy
    • 1588 Hybrid Clock

Applications

  • Equipments for Energy Market
  • Electric Substations (IEC 61850)
  • Industrial Networking
  • Transport
  • Defence and Aerospace

Technical Specifications

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Semiconductor IP