HDMI TX PHY IP

Overview

HDMI transmitter PHY (Physical layer) IP core which is fully amenable with HDMI 1.4/2.0 specification.HDMI transmitter PHY which can be compatible with 25MHz to 250MHz pixel clock, and offers a simple execution for a system for consumer electronics like DVD player/recorder and camcorder. We provide HDMI TX IP solutions with excellent quality, dense areas, and competitive power consumption. It’s not only complied with HDMI v1.4/2.0 specification but also with the full range of operation frequency to support various applications HDMI TX PHY core supports 1080p video resolution including deep-color mode, 3D, and 4K x 2K video format. The HDMI TX PHY core can generate both pixel clock and TMDS clock from a reference clock, which eliminates the need for separate pixel clock generator in a SOC.It is available in many Technology node -130/90/65/55/45/40nm.

Key Features

Supports DTV from 480i to 1080i/p HD resolution
Support 24bit, 30bit and 36bit color depth per pixel
Support HDMI v1.4/2.0 with a full range of operation frequency
Supports on-chip source termination
Integrated cable terminator
Adaptive equalizer for cable
Adjustable analog characteristics
Supports internal loopback for low-cost at-speed test
PLL bandwidth
VCO gain with BGR voltage
Cable terminator resistance value
Supports programmable analog characteristics through JTAG, APB register control
DLL digital filter characteristics
Integrated Audio PLL
3.3V/2.5V/1.0V power supply

Applications

Interfaces within a PC and monitor
External display connections, including interfaces between a PC and monitor or projector, between a PC and TV, or between a device such as a DVD player and TV display

Deliverables

Datasheet
Integration guideline
GDSII or Phantom GDSII
Layer map table
CDL netlist for LVS
LEF
Verilog behavior model
DRC/LVS/ERC results

Technical Specifications

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