HDMI 14 TX PHY

Overview

The HDMI Tx PHY is the physical layer of a single-link HDMI transmitter interface. The HDMI Tx PHY comprises three-line drivers for data transmission and an additional line driver for clock transmission. The HDMI Tx PHY is designed to perform the serialization and transmission of video data and control information through an HDMI interface. The HDMI Tx PHY interfaces with an HDMI Tx link controller through a common graphic controller interface supporting 30-,60- or 120-bit data transfers. A clock line driver is used for reference clock transmission.

Key Features

? Support for 4k x 2k and 3D video formats
? Support for up to 16-bit Deep Color modes
? Link controller flexible interface with 30-,60-or 120-bit SDR data access
? Up to 18 Gbps aggregate bandwidth
? Support for power collapsing
? Driver with features for extra-long cables
? Pre-emphasis enable
? Slope boosting
? Programmable source terminations
? HPD input analog comparator
? Rx sensing
? 5-V protection
? 13.5–600 MHz input reference clock
? 50% duty-cycle output clock
? Embedded A/D converter and analog testbus for ATE testing
? Built-in pattern generator
? Small core area

Deliverables

We offer high-speed interface IPs designed for 28~90nm fabrication processes in various foundries. We can also customize porting IPs for customers requiring 90~180nm fabrications and support more advanced processes as needed.

Technical Specifications

Foundry, Node

TSMC,40,55,65; SMIC,40; GF,40; UMC,40

Maturity

Silicon Proven

Availability

Immediate

GLOBALFOUNDRIES

Silicon Proven: 40nm LP

SMIC

Silicon Proven: 40nm LL

TSMC

Silicon Proven: 40nm LP , 55nm GP , 55nm LP , 65nm GP , 65nm LP

UMC