IP Catalog > Interface IP > Interconnect IP > HDMI IP > HDMI Controller IP > HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC

Overview

IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders and camcorders, the HDMI transmitter PHY offers an easyto-implement system LSI solution that supports pixel clocks between 25MHz and 250MHz. The following Fab/Nodes have all undergone Silicon Proving: (TSMC, UMC, SMIC, GF, Samsung, ST). It will be straightforward to integrate the HDMI Transmitter Link IP Core into the SoC of consumer goods because it supports HDMI 1.4b and runs at 2.25 Gbps, 16-bit deep colour, and 3D compatibility (HD-TV, AV receiver... etc.). Linking the HDMI Rx IP to the HDMI Transmitter PHY IP will give it the optimum performance, features, and efficiency. Various HDMI Tx IP configurations are available.

Key Features

  • HDMI version 1.4 compliant transmitter
  • Supports DTV from 480i to 1080i/p HD resolution
  • Supports 24bit, 30bit and 36bit color depth per pixel
  • Integrated cable terminator
  • Adaptive equalizer for cable
  • Adjustable analog characteristics
  • PLL band width
  • VCO gain
  • BGR voltage
  • Cable terminator resistance value
  • DLL digital filter characteristics
  • Integrated Audio PLL
  • 3.3V/2.5V/1.0V power supply
  • HDMI version 1.4a, HDCP revision 1.3 and DVI version 1.0 compliant receiver
  • Controller Supports DTV from 480i to 1080i/p HD resolution, and PC from VGA to UXGA
  • Supports 3D video format specified in HDMI 1.4a specification
  • Programmable 2-way color space converter
  • Compliant with EIA/CEA-861D
  • Deep color supported up to 16bit per pixel
  • xvYCC Enhanced Colorimetry
  • All packet reception including Gamut Metadata Packet
  • Supports RGB, YCbCr digital video output format including ITU.656
  • 24/30/36/48bit RGB/YCbCr 4:4:4
  • 16/20/24bit YCbCr 4:2:2
  • 8/10/12bit YCbCr 4:2:2 (ITU.601 and 656)
  • 48 bit mode is not supported in 1080p
  • Supports standard SPDIF output for stereo or compressed audio up to 192KHz
  • Support PCM, Dolby digital, DTS digital audio output through 4bits I2S up to 8 channel
  • IEC60958 or IEC61937 compatible
  • 1bit audio format (Super Audio CD) output
  • High-bitrate compressed audio formats output
  • Slave I2C interface for DDC connection
  • Configuration registers programmable via synchronized parallel interface
  • Interface to external HDCP key storage
  • Silicon Proven in UMC 28HPC+.

Benefits

  • 1.85625Gbps low cost PHY
  • Support HDMI1.4a spec
  • Up to 1080P60 with HDR

Block Diagram

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC Block Diagram

Applications

  • PC Graphic card
  • Blue ray DVD
  • DVD player,
  • STB,
  • Fiber IP STB, etc.
  • HDMI repeater, splitter, etc

Deliverables

  • GDS
  • Configurable RTL Code
  • HDL based test bench and behavioral models
  • Test cases
  • Protocol checkers, bus watchers and performance monitors
  • Configurable synthesis shell
  • Documentation
  • Design Guide
  • Verification Guide
  • Synthesis Guide

Technical Specifications

Foundry, Node
UMC 28HPC
Maturity
In Production
Availability
Immediate
UMC
In Production: 28nm HPC
Request Info

Related IPs

×
Semiconductor IP