HDMI 1.4 Transmitter IP in UMC 40LP

Overview

Key Features

• - Clock range : 25-300MHz
• - Built in Band Gap Reference (BGR), PLL, Serializer
• - PADS cell includes ESD protection circuit
• - Built in termination resistor
• - Receiver sense function
• Detect the presence or absence of HDMI Sink equipment
• - Built in Self Loop-Back test

Deliverables

• Link in RTL code and PHY GDS2 at foundry merge; documentations included Link and PHY specifications, SoC integration guildlines & board level design guildlines to pass HDMI certification

Technical Specifications