GP Successive Approximation A/D
Key Features
- Hard IP
Technical Specifications
TSMC
In Production:
180nm
G
Pre-Silicon: 180nm G
Silicon Proven: 180nm G
Pre-Silicon: 180nm G
Silicon Proven: 180nm G
Related IPs
- This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution.
- Successive Approximation ADC_2M10b
- Successive Approximation ADC_2M12b
- Successive Approximation ADC_3M10b
- A/D Converter IP, 18 bits, 96Ksps, UMC 0.25um Logic process
- A/D Converter IP, 10 bits, 40Msps, UMC 0.18um Mixed-Mode process