Fully Self-contained Single/Multi Port USB Type-C Power Delivery IP

Overview

SiliConch SCPD3013IP is a self-contained configurable Multiport USB Type-C Power Delivery (PD) Design IP that is based on the latest USB Power Delivery specification revision 3.0 and USB Type-C Cable and Connector specification revision 1.3. SCPD3012IP uses high performing customized 8-bit, 50-MHz MCU with configurable internal flash up to 72-KB, 8-KB SRAM, 24 GPIOs, an Authentication engine, and integrated VCONN FETs. Each port is independently capable of supporting Provider only, Consumer only, Provider/Consumer and Consumer/Provider PD Roles along with Type-C specific upstream-facing port (UFP), downstream-facing port (DFP) or dual-role port (DRP).

The analog PHY portion detects and supports dead battery interaction with Power Management (PMIC) and Battery Charger (BC) modules. SCPD3013IP provides an interface with system host to update control and status information especially needed for System Policy Manager (SPM) communication. In addition, SCPD3012IP supports authentication, alt mode and advanced low-power management.

SCPD3012IP with 4 Type-C ports is already available in early proto-type proven form on FPGA based development kit and 50-QFN test chip package will be available by Q1 2017.

Key Features

  • Fully compliant with USB PD Specification revision 3.0 and Type-C Cable and Connector specification revision 1.3
    • Completely self-contained (Embedded Controller (EC) less operation) configurable multi-port PD system
    • Multi-port(s) are managed under the control of Device Policy Manager (DPM) firmware stack running over MCU for PD negotiation across ports
    • Hardware implementation of Physical (PHY), Protocol and Policy Engine layers for power and area savings
    • System host control interface for System Policy Manager interaction
    • Integrated VCONN FETs with over current protection (OCP) and over voltage protection (OVP)
    • Supports dead battery operation
    • Supports audio accessory, debug accessory and alt modes
    • Supports SOP* for communicating with EMC cable ICs, alternate modes and protocol adapters
    • Firmware configurability
      • Role configuration for Provider (Source) only, Consumer (Sink) only, Provider/Consumer and Consumer/Provider for power
      • Vendor Defined Messages (VDM)
      • Alt mode support for DisplayPort over Type-C
      • Framework to support wide range of Power Management Integrated Circuit (PMIC) and Battery Charger (BC) ICs
      • Support for USB PD hardware layer bypass modes
    • 8-bit MCU Subsystem
      • 50-MHz High performing MCU
      • Configurable internal flash up to 72-KB
      • Configurable SRAM up to 8-KB in case of internal flash support
      • Integrated MUL and DIV blocks
    • Integrated Digital blocks
      • Common hardware Crypto block for authentication across multiple ports
      • I2C, SPI and UART
    • Low Power Modes supported

    Benefits

    • Distinctive Benefits
      • Early IP Developer for Rev3.0/Rev2.0
      • Self-contained Multi-port Sub-system
      • Authentication Engine
      • DP Alt-mode & Audio accessory
      • Customized license-free MCU
      • PMIC & BC interface controller
      • Built-in Flash support
      • Deep Sleep Mode
    • Bug-free IP Promise
      • Silicon proven
      • Early Prototype PoC with Interop Testing

    Block Diagram

    Fully Self-contained Single/Multi Port USB Type-C Power Delivery IP Block Diagram

    Video

    SiliConch USB Type-C Power Delivery IP PoC Demo

    Applications

    • Computing and Smartphone
      • Laptop / Notebook
      • Tablet
      • Smartphone
      • Desktop
    • Consumer Electronics
      • TV / Display Monitor
      • Printer
      • Scanner
    • Power related
      • Wall charger
      • Power bank
      • Power Hubs
    • Docking stations
    • USB Type-C Cables

    Deliverables

    • Fully Synthesizable Verilog RTL source code
    • Firmware source code
    • ASIC Synthesis constraints and scripts files
    • FPGA Synthesis constraints and scripts files
    • FPGA Development platform kit
    • Complete USB PD IP in GDSII including Analog PHY
    • UVM based Verification Environment and test sequences
    • User Manual, Programming guide and Verification documents

    Technical Specifications

    Foundry, Node
    130nm BCD, 150nm BCD, 65nm and 180nm BCD
    Maturity
    Silicon proven IP
    Availability
    Immediate
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Semiconductor IP