FlexNoC 5 Option For Scalability and Performance Critical Systems

Overview

Key Features

• Scales from 10s to 100s of IP blocks
• Automatically generates ring, mesh and torus networks
• View and edit generated topologies
• Edit and optimize individual network routers
• Multicast writes for efficient data broadcast
• Source synchronous communications for long data paths eases clock tree synthesis
• VC-Link™ virtual channels allow sharing of long physical links in congested areas of the die while maintaining quality-of-service (QoS).
• HBM (e.g. HBM2/HMB2E/HBM3) and multichannel memory support
• The separately available Functional Safety (FuSa) Option helps meet up to ISO 26262 ASIL B and D requirements against random hardware faults.

Benefits

• SILICON PROVEN
  • FlexNoC is the first commercial NoC interconnect and is shipping in over 3 Billion chips. It is the backbone SoC interconnect used by Huawei / HiSilicon, Samsung, Mobileye, Altera (Intel), and other industry leaders for their most important projects.
• REGULAR TOPOLOGY GENERATION AND EDITING
  • FlexNoC AI Package automatically generates mesh, ring and torus interconnect topologies. Unlike black box compiler approaches, SoC architects can edit generated topologies and also optimize each individual network router, if desired.
• MULTICAST
  • Intelligent multicast optimizes the usage of on-chip and off-chip bandwidth by broadcasting data as close to network targets as possible. This allows for more efficient updates of DNN weights, image maps and other multicast data.
• VC-LINK™ VIRTUAL CHANNELS AND SOURCE SYNCHRONOUS COMMUNICATIONS
  • For long chip-crossing datapaths and congested wire routing channels.

Block Diagram

Technical Specifications