eTCAM (Embedded Ternary Content Addressable Memory IP

Overview

TCAM can search for data that matches the input in one cycle from all the information stored in the memory.If there are multiple matching data, it is possible to find all of them.By adding a priority encoder (RTL), it is possible to select one from multiple matching data.

Renesas have long trading record with major networking company to provide TCAM. And we have started to provide compact range embedded TCAM IP for ASIC customer from 2016. Our eTCAM is consisted with hard IP compiler and soft priority encoder. We provides a custom BIST RTL with test algorithms developed based on our extensive experience in mass production of eTCAM devices. For 7nm geometry, new pre-search function is implemented to realize further power saving.

Key Features

One cycle operation latency (without priority encoder)
Valid Bit per entry to reduce power
Valid Bit reset in one cycle support
Mask input option for bit-write and masked search key
Additional power emulation library support
All Mismatch output and Pre-Search function support (from 7nm)
BIST support with redundancy

Benefits

Small area:

By optimizing the peripheral circuit of memory, particularly small area is realized.

Low power:

Optimized low leakage design, valid bit control and search mask will make low power performance achievable. What s more, providing a design environment that allows customer to confirm the power saving feature according to the actual usage conditions. For 7nm geometry, new pre-search function is implemented to realize further power saving.

IDM-oriented design quality:

Many product proven.

Block Diagram

Deliverables

User s guide
Data sheet
Hard macro FE library ( Verilog model, LEF, Liberty, Fastscan, dftmax, Tetramax )
Hard macro BE library ( CDL, GDS )
Soft macro ( RTL BIST Wrapper )

Technical Specifications

TSMC

Pre-Silicon: 7nm

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