ECDSA sign engine

Overview

Elliptic curves form the foundation of cutting-edge public-key cryptography, serving as a crucial component for secure digital signatures and robust key agreement protocols, such as the esteemed Diffie-Hellman scheme. Leveraging the mathematical properties of elliptic curves, CryptOne emerges as a formidable IP Core specifically engineered to execute elliptic curve cryptography operations with unparalleled efficiency and reliability.

Adhering to the rigorous guidelines set forth by the Federal Information Processing Standards (FIPS) 186 standard, our CryptOne solution not only meets but exceeds the stringent security requirements demanded by modern electronics. By supporting a diverse array of elliptic curves, CryptOne empowers users with the flexibility to select curves that align with their specific cryptographic needs, ensuring compatibility with a wide range of cryptographic systems.

What sets CryptOne apart is its ingenious design and remarkable scalability achieved through the utilization of DCD’s exceptional IP core architecture. This groundbreaking architecture enables the implementation of CryptOne with an incredibly compact silicon footprint, maximizing resource utilization while minimizing overhead costs. Furthermore, CryptOne’s superior processing speeds deliver lightning-fast cryptographic operations, enabling rapid and seamless integration within high-performance computing environments.

With CryptOne’s innovative IP core at the heart of your cryptographic infrastructure, you can harness the power of elliptic curves with unmatched efficiency, reliability, and compliance, ushering in a new era of secure communications and data protection.

When safety & security meet the best size/performance ratio… ECDSA IP Core!

Key Features

  • Supported Elliptic Curves
    • NIST SECP P-256 R1
    • NIST SECP P-384 R1
    • Koblitz SECP P-256 K1
    • Koblitz SECP P-384 K1
    • Brainpool P-256 R1
    • Brainpool P-384 R1
    • Brainpool P-512 R1
    • other/custom curves optional support
  • Optional Side Channel Attacks countermeasures
  • Input/Output EC point verification
  • Fully synthesizable, synchronous design
  • Highly configurable in terms of performance and resource consumption
  • Minimum operation delay at 200 MHz:
    • Point multiplication:
      • EC256: 2.5 ms
      • EC384: 5.0 ms
    • ECDSA signature generation
      • EC256: 2.6 ms
      • EC384: 5.2 ms
    • ECDSA signature verification
      • EC256: 3.1 ms
      • EC384: 6.3 ms
    • Estimated resource usage
      • from 30k to 110k NAND gates

    Deliverables

    • HDL Source Code
    • Testbench environment
      • Automatic Simulation macros
      • Tests with reference responses
    • Synthesis scripts
    • Technical documentation
    • 12 months of technical support

    Technical Specifications

    Availability
    Now
×
Semiconductor IP