DVB-T2 LDPC+BCH decoder

Overview

The TC4500 Core complies with DVB-T2 specifications. It covers all the FEC and modulation options, including L1 signalling modes. The Core is based on a low complexity architecture, and is available for FPGA or ASIC implementation.

Key Features

  • I/Q demapping (BPSK, QPSK, 16QAM, 64QAM and 256QAM)
  • Bit deinterleaver (16,64 and 256 QAMs)
  • inner LDPC decoding
  • outer BCH decoding
  • 16kbit and 64kbit frames
  • Supports L1 pre and post-signalling modes
  • Syndrome-based LDPC iteration stopping
  • Frame error detection indication
  • Built-in SNR estimation

Applications

  • DVB-T2

Technical Specifications

Maturity
field proven
Availability
Now
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Semiconductor IP