DVB-CID Modulator
Overview
The IPrium-DVB-CID-Modulator IP Core implements the modulation standard ETSI TS 103 129 V1.1.1 (2013-05) DVB-CID. The IP Core contains Format Message FIFO, CRC8 Generator, BCH Encoder, Scrambler, Differential Encoder, PN Spreading and complete BPSK Modulator with fractional resampler, complex mixer and output gain control.
Key Features
- Fully synchronous design, using single clock
- Fully synthesizable drop-in module for FPGAs
- Optimized for high performance and low resources
- Low implementation loss
- Fully verified and real-time tested on a FPGA based development platform
- Considerations for easy ASIC integration
- Validated on IPrium Evaluation Boards
Deliverables
- VQM/NGC/EDIF netlists for Altera Quartus II, Xilinx ISE, Lattice Diamond or Microsemi (Actel) Libero SoC
- IP Core testbench scripts
- Design examples for Altera, Xilinx, Lattice, and Microsemi (Actel) evaluation boards
- Free 1 year warranty and support period
Technical Specifications
Maturity
Silicon proven
Availability
Now