Dual channel 12-bit, 4GS/s ADC IP for 5G in 8nm process
Overview
ADIQ12B4G08NLL is a Dual channel 12-bit analog-to-digital converter (ADC) that operates up to 4.0 GS/s. This ADC samples wide bandwidth analog signals with good linearity best suited for many applications. Small footprint and completely integrated reference drivers simplify integration complexity in RF front-end and SOC. In-built calibration engine helps reducing sensitivity to process, voltage and temperature variations which improves overall system robustness.
Key Features
- Technology: Samsung 8nm LPP process
- Metal Scheme: 1p8m_5x2z
- Dual channel 12-bit, 4GS/s Analog-to-Digital Converter
- Differential analog input
- 0.75 V/1.8 V analog and 0.75 V digital power supply
- Small footprint
- Internal reference generator (no external component)
- Low power
- -40?C to +125?C Operating Temperature Range
- Self-calibrating ADC (offset, gain and skew errors)
- Background calibration algorithms to track PVT variations
- Serial port control for flexible digital control
- Input Buffer @ 1.8 V Supply
- Input capacitance = 0.8 pF
- Lowest analog supply for GHz sampling frequency operation
Benefits
- High-Performance
- Self Calibrating
- Small Die Area
- Ultra-Low power
- Suitable for high speed design
Applications
- 5G
- LTE
- Wideband RF Receiver
- Industrial Instrumentation
- Radar
- Electronic surveillance
Deliverables
- Dataseet
- Behavioral model
- Abstract LEF
- Timing LIB files
- CDL
- GDSII
- Full integration support
Technical Specifications
Foundry, Node
Samsung 8nm
Maturity
GDS Available
Availability
Feb 2020