Distributed Thermal Sensor (DTS) Deep NWELL, TSMC N3

Overview

The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy measurement across a wide temperature range at enhanced conversion speeds. Thermal activity can be unpredictable and if not monitored carefully can cause over-heating and excessive power consumption which in turn impacts device longevity. The ability to make precise thermal measurements beside or within CPU cores, high speed interfaces or highly active circuitry has become a mandatory requirement for devices used within a range of application areas. This In-Chip Sensing and PVT Monitoring IP is available as part of the Synopsys DesignWare® Foundation IP portfolio. It also forms the foundation of the new Synopsys Silicon Lifecycle Management (SLM) platform. SLM enables new levels of insight for both SoC providers as well as their customers to optimize operational activities at each stage of the device and system lifecycles from design to in-field.

Key Features

  • Small remote sensors
  • Central hub
  • High Accuracy
  • High Resolution
  • Faster conversion speed
  • Distributed Instance
  • Easily integrated
  • Digital Interface
  • Low Power

Benefits

  • Easier integration closer to hotspots in multi core devices
  • Real-time thermal mapping
  • Accurate sensing for fine grain thermal management
  • Fast, low latency conversions
  • Development of thermal and power aware silicon software
  • Supporting DVFS and AVS schemes for precise thermal management

Applications

  • Deeply embedded thermal analysis
  • DVFS
  • Thermal profiling

Deliverables

  • GDSII
  • LEF (Abstract) view
  • Liberty timing files
  • LVS netlist
  • Verilog model

Technical Specifications

Foundry, Node
TSMC, N3
Maturity
Available on Request
Availability
Available
TSMC
Pre-Silicon: 3nm
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Semiconductor IP