DisplayPort Intel® FPGA IP Core

Overview

Intel now offers a fully VESA-compliant DisplayPort Intel® FPGA IP core v1.4. The DisplayPort IP core is found prevalently in many video-related products servicing a wide variety of applications and has the following features:

DisplayPort is a high-speed serial interface standard for video and audio supported by industry leaders in broadcast, consumer, medical, industrial, and military applications. It is primarily used to connect video sources to display devices like computer monitors.

The DisplayPort Intel® FPGA IP core has the following advantages:

  • Higher bandwidth with DisplayPort v1.4
  • Royalty-free standard
  • Data transmission on all four lanes
  • Latching cable to physically secure connection
  • Multi-Stream Transport to run multiple monitors from a single cable

The VESA-certified DisplayPort Intel FPGA IP core implements a receiver and transmitter per lane with 1, 2, or 4 differential data lanes at 1.62, 2.7, 5.4, or 8.1 Gbps. HDCP-encrypted transmission can also be integrated into our IP through the newly released Intel® FPGA HDCP core. DSC can also be integrated into our IP through one of Intel's partners. For more information, contact Bitec.

IP Core Feature Description
Scalable main data link
  • 1, 2 or 4 lane operation
  • 1.62, 2.7 , 5.4 or 8.1 Gbps per lane with an embedded clock
Color support
  • RGB 18, 24, 30, 36 or 48 bits per pixel (bpp) color depths
  • YCbCr 4:4:4 24, 30, 36 or 48 bpp color depths
  • YCbCr 4:2:0 12, 15, 18 or 24 bpp color depths
  • YCbCr 4:2:2 16, 20, 24 or 32 bpp color depths
Transceiver data interface 40 bit (quad symbol) or 20 bit (dual symbol)
Pixels per clock 1, 2 or 4 pixels per clock
Audio 2 or 8 channels of embedded audio
Multistream transfer 1 to 4 source and sink video streams
HDCP [Note: The High-bandwidth Digital Content Protection (HDCP) feature is not included in the Intel Quartus Prime Pro Edition software. To access the HDCP feature, contact Intel] Support HDCP 1.3 and HDCP2.3

Block Diagram

DisplayPort Intel® FPGA IP Core Block Diagram

Technical Specifications

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Semiconductor IP