DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage ; UMC 65nm 1.0V with 2.5V Device SP/RVT LowK Logic Process

Overview

DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage ; UMC 65nm 1.0V with 2.5V Device SP/RVT LowK Logic Process

Technical Specifications

Short description
DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage ; UMC 65nm 1.0V with 2.5V Device SP/RVT LowK Logic Process
Vendor
Vendor Name
Foundry, Node
UMC 65nm
Maturity
Silicon proven, Formal release
UMC
Pre-Silicon: 65nm LL , 65nm LP , 65nm SP
×
Semiconductor IP