DCDC Buck Converter

Overview

U40LPDCDC1P1V1 is a high efficiency, low quiescent-current buck converter, suitable for applications where the input voltage is higher than the output. The buck converter is based on a fixed frequency, pulse-width-modulation (PWM) controller using synchronous rectification to obtain the highest efficiency. At low load currents, the converter enters Power Save Mode to maintain high efficiency over the complete load current range. The PFM pin allows the user to select between automatic-PFM/PWM mode operation and forced-PWM operation.

Key Features

  • •Process: UMC 40nm Logic and Mixed-Mode 2.5V/1.1V Low Power Process
  • •Efficiency: ~90% when IOUT=300mA (VIN=5V, considering the 100m? parasitic resistance of VIN and PGND respectively, 300m? parasitic resistance of VIN and AGND respectively and 100m? ESR of external inductor; if the parasitic resistance because of bonding, lead frame, PCB trace and ESR of external inductor is smaller, the efficiency will be higher.)
  • •3.3 V to 5.5 V Input voltage range
  • •0.3-A Max. output current: VIN >= 3.3 V,
  • VOUT = 1.1 V
  • •Typical switching frequency: ~1MHz
  • •Standby current < 500 uA
  • •Soft Start-up Time: max. 1ms from active to Vout=1.1V
  • •Automatic power save mode or forced PWM mode
  • •Over Current Protected: ~700mA
  • •Over temperature protection:~150°C
  • •Area < 460um x 555um

Block Diagram

DCDC Buck Converter Block Diagram

Technical Specifications

Foundry, Node
UMC 40nm Logic and Mixed-Mode 2.5V/1.1V Low Power Process
Maturity
Available on request
Availability
Available
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Semiconductor IP