The CXL Verification VIP provides an effective & efficient way to verify the components interfacing with CXL Switch interface of an IP or SoC. The CXL Switch is fully compliant with latest CXL specifications. This VIP is a light weight with an easy plug-and-play interface so that there is no hit on the design cycle time
CXL Switch Verification IP
Overview
Benefits
- Available in native System Verilog (UVM/OVM/ VMM) and Verilog
- Unique development methodology to ensure the highest levels of quality
- Availability of Compliance & Regression Test Suites
- 24X5 customer support
- Unique and customizable licensing models
- Exhaustive set of assertions and coverage points with connectivity example for all the components
- Consistency of interface, installation, operation, and documentation across all our VIPs
- Provide complete solution and easy integration in IP and SoC environment
Block Diagram
Deliverables
- CXL Host/Device/Switch
- CXL BFM/Agents for:
- Host,Device and Switch sequences
- Transaction layer(CXL.IO and CXL.cache, CXL.mem)
- Link layer(CXL.IO and CXL.cache, CXL.mem)
- Arbiter/Mux layer
- Phy layer
- CXL Monitor and Scoreboard
- Test Environment & Test Suite:
- Basic and Directed Protocol Tests
- Random TestsError
- Scenario Tests
- Cover Point Tests
- Compliance Tests
- Documents:
- Integration Guide
- User Manual
- Quick start Guide, Release Notes
- FAQs