VeriSilicon CSMC 0.13μm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Central Semiconductor Manufacturing Corporation (CSMC) 0.13μm Logic 1P8M Salicide 1.2/3.3V process. This library supports Device Under Pad (DUP).
This library includes analog I/O cells and digital I/O cells. The digital I/O cells can take 5V tolerance and work with configurable and variable driving strength between 2mA - 24mA. Its maximum rating frequency is 200MHz, but the actual frequency depends on loading, system timing requirement and selected IO driver strength.
This library supports Inline DUP I/O pad.
CSMC13V33 process DUPIO, This library includes analog I/O cells and digital I/O cells and supports Inline DUP I/O pad.
Overview
Key Features
- VeriSilicon CSMC 0.13μm 1.2V/3.3V DUP I/O Cell Library supports design with six, seven or eight layers of metal.
Technical Specifications
Foundry, Node
CSMC 0.13um
Maturity
Pre-Silicon
SMIC
Pre-Silicon:
130nm
EEPROM
,
130nm
G
,
130nm
LL
,
130nm
LV
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