Cryogenic 12 bit ADC

Overview

Successive Approximation Register (SAR), interleaved 8-fold
• Operating temperature 50 to 350 Kelvin
• Radiation tolerant (TID > 1Mrad, SEU/SEU > 62.2 LET)

Key Features

  • Successive Approximation Register (SAR), interleaved 8-fold
  • 12 bit default nominal resolution
  • 14 bit and 16 bit resolution by in-ADC transparent oversampling, resulting in 12 and 13 ENOB
  • 0.7LSB noise, 0.7LSB DNL, 4LSB INL in nominal mode, @RT, BOL
  • Unsupervised calibration and code gap removal.
  • Accepts pseudo-differential, fully differential and single-ended signals
  • Input sample rate nominal 40 MHz
  • Analog supply 3.3V
  • Digital supply 1.8V
  • Differential (sub-)LVDS / CML output at 480 Mbps nominal rate

Applications

  • ADC for space applications/(image) sensors
  • ADC for cryogenic applications/(image) sensors
  • ADC for nuclear and hazardous environment inspection applications

Deliverables

  • ceramic package or gds with datasheet
  • The evaluation kit available

Technical Specifications

Foundry, Node
110-130
Maturity
Design ready, taped out, measurements pending
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Semiconductor IP