The Controller IP for MIPI® SoundWire® v1.2 is a fully verified, configurable, digital core that is compliant with the MIPI Alliance SoundWire specification. It is an ideal solution for transporting audio and related data from baseband or application processors to audio devices.
Controller for MIPI Soundwire
Overview
Key Features
- MIPI compliant peripheral controller with multi-lane capability
- APB Peripheral interface for control port and manager configuration registers
- APB Initiator interface for external user defined registers
Benefits
- Full-Featured and Highly Configurable IP Core
- Area-customized for each application
- Complete Solution
- Complementary initiator/target
Block Diagram
Applications
- Automotive,
- Communications,
- Consumer Electronics,
- Data Processing,
- Industrial and Medical,
- Military/Civil Aerospace,
- Others
Deliverables
- Documentation—implementation specification, user guide, release history
- Clean, readable, synthesizable Verilog RTL
- Synthesis scripts
- Sample verification testbench with integrated BFM, monitors, and sanity tests
Technical Specifications
Maturity
Silicon Proven
Related IPs
- MIPI SoundWire Master Controller 1.1
- MIPI SoundWire Slave Controller 1.1
- MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI CSI-2 controller Receiver v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
- MIPI D-PHY TX/CSI2 Link Controller
- MIPI D-PHY Universal Tx / Rx v1.1 @1.5ghz Ultra Low Power for IoT & Wearables