The Cascaded Integrator Comb (CIC) Filter, or Hogenauerfilter, is a multiplier less filter architecture that is extremely important for implementing area efficient high sample rate changes in Digital Down Converters (DDC) and Digital Up Converters (DUC). Although its algorithm is quite easily understood, hardware engineers are looking to avoid the time consumed by implementing and maintaining their own IP, while also looking to be able to make quick, informed and resource efficient implementation decisions.
The CIC Compiler reduces filter implementation time to the push of a button, while also providing users with the ability to make trade-offs between differing hardware implementations of their CIC Filter specification. These easily made trade-offs give users the ability to select the most resource and power efficient solutions for their specific applications.
Cascaded Integrator Comb (CIC) Compiler
Overview
Key Features
- AXI4-Stream-compliant interfaces
- Decimation or interpolation
- Fixed or programmable rate change from 4 to 8192
- Three to six CIC stages
- One or two differential delays
- Support of signed, twos complement input data from 2 bits to 32 bits
- Full or limited precision output data
- Single or multichannel support for up to 16 channels
- Hardware folding for small footprint implementations
- Optional mapping to DSP48E1 Slices
- Synchronous clear input
- Clock enable input
- Use with Xilinx Vivado® IP Catalog and Xilinx System Generator for DSP