The most advanced CAN-XL Controller Core performs serial communication as per CAN 2.0, CAN-FD & CAN-XL Specifications. It also supports original Bosch Protocol & ISO 11898 specifications for TTCAN (Time Triggered Operation) as specified in ISO11898-4. The design is fully optimized to support AUTOSAR and SAE J1939 specifications. The CAN-XL Controller core is easy to integrate with the Host processor using AMBA-AXI standard interface. This highly configurable design supports programmable Interrupts, data and baud rates, acceptance filters & buffering schemes specific to the application.
CAN-XL Controller
Overview
Key Features
- ASIL-C, ISO26262 Certified, Automotive Grade
- CAN Specifications Support
- CAN 2.0, CAN-FD (ISO 11898-1.2015 & legacy ISO and Bosch Specifications)
- CAN-XL (CiA 610-1 version 1.0.0)
- TTCAN (ISO 11898-4 level 1)
- AUTOSAR and SAE J1939
- Fully programmable 1Mbits/sec with CAN 2.0 and several Megabits/sec for CAN-FD & CAN-XL design
- Enhanced Safety with CADsec Protocol support
- Implements cascaded CRC with Hamming Distance-6, meaning all errors detected
- Optional CADsec for node-to-node protection using 4-byte header with ciphercontrol, secure channel ID & 128-bit authentication tag
- Optional Payload Encryption
- Loop-Back Mode for self-diagnostics
- Time stamping compliant to CiA-603 Specification
- ISO-26262 ASIL-B Readiness with ECC for SRAM memory
- Optional ISO26262 ASIL-C Support
- Ease of Integration, Usage & Porting
- AMBA-AXI Interface
- Optional Multi-CAN Wrapper for controlling multiple CAN Bus Nodes using a single host CAN Controller
- Supports CAN-XL Transceiver with Mici (Medium Independent CAN Interface) for Dual-Mode Transceivers
- Compliance Check
- Multiple 3rd party CAN2.0, CAN-FD & CANXL Verification IP Protocol Compliance checked
Benefits
- The vendor announces the ISO26262 ASIL-C functional certification of its 2nd generation CAN Trio supporting CAN 2.0, CAN FD and CAN XL with CANsec IP for secure CAN Bus transactions.
Block Diagram
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Video
ARASAN CAN FD IP SOLUTION FPGA DEMO
Arasan, a leading provider of semiconductor IP for all things mobile, including automobiles released its 2’nd generation of CAN IP FPGA demo video.
Deliverables
- System Verilog RTL Source Code
- A simplified Testbench with simulation models to run initial set of tests after release
- Synthesizable Netlist
- Synthesis Scripts and exception lists
- Timing Report
- Protocol Compliance & Coverage Report
- Sample Firmware with Drivers
- Application Notes
Technical Specifications
Maturity
Silicon Proven
Availability
Now
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