CompactFlash/PCMCIA Host Controller

Key Features

  • Compliant with PC Card Standard 8.0, PCMCIA 2.1/JIEDA 4.2 and Compact-Flash 1.4
  • Allows host bus devices to access CompactFlash and PC Card/PCMCIA devices.
  • Simple user interface optimized for on-chip bus connection.
  • Dual clock design allows the user interface and the Card interface to operate at different clock domains.
  • User interface supports 32-bit and 64-bit data.
  • In PC Card/PCMCIA mode, supports attribute memory access, common memory access and IO access.
  • In CompactFlash mode, supports attribute memory access, common memory access, IO access and IDE mode access.
  • Converts 64/32-bit CPU access to multiple 8-bit or 16-bit accesses.
  • Supports burst access by CPU. Burst access dispatched as multiple single accesses to the CompactFlash/PCMCIA interface.
  • Direct mapping of host address space to card address space.
  • CPU may operate at higher frequency while the card interface operates at lower frequency.
  • Designed for ASIC and FPGA implementations.
  • Fully static design with edge triggered flip-flops.
  • Differentiating Features
    • CPU or generic user interace selection.
    • External power switch support.
    • Dual card interface.
    • 82365SL compatible and EXCA register set.

Block Diagram

CompactFlash/PCMCIA Host Controller Block Diagram

Technical Specifications

Foundry, Node
ASIC and FPGA
Availability
now
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Semiconductor IP