CAN 2.0 Bus Controller IP

Overview

Classical CAN, also known as CAN 2.0 Bus Controller IP, is the foundational CAN bus standard. It offers reliable communication at moderate data rates and is widely used in automotive applications such as powertrain control, chassis control, body electronics, and in-vehicle networks. The simplicity, robustness, and proven track record of Classical CAN make it suitable for applications that do not require high data rates or large payload sizes.

The CAN IP Controller Core performs serial communication as per CAN IP 2.0 Specifications. It supports full CAN IP 2.0 (both CAN IP 2.0A and 2.0B). The design implements the BOSCH CAN IP Message Transfer Protocols 2.0A (which is equivalent to CAN IP 1.2 and covers standard message formats with 11-bit identifiers); and 2.0B which covers both standard and extended message formats (both 11-bit and 29-bit identifiers). The CAN IP Controller core is easy to integrate with the Host processor using an AMBA-AHB standard interface. This highly configurable design supports programmable Interrupts, data and baud rates, acceptance filters & buffering schemes specific to the application By leveraging the appropriate CAN bus standard within an SoC, automotive systems can benefit from optimized communication performance, enhanced bandwidth, and the ability to meet the specific requirements of their target applications.

 

Block Diagram

CAN 2.0 Bus Controller IP Block Diagram

Video

CAN FD IP SOLUTION FPGA DEMO

Arasan, a leading provider of semiconductor IP for all things mobile, including automobiles released its 2’nd generation of CAN IP FPGA demo video.

Deliverables

  •  Full CAN IP 2.0, both BOSCH CAN IP 2.0A and CAN IP 2.0B
  •  Fully programmable from 128Kb/sec to 1Mbits/sec Reliability, Availability, Serviceability (RAS)
  •  Error Diagnostics for all error types like Bit error, Stuff Error, CRC error, Form Error and Acknowledgement Errors
  •  For safety extensive error detection support such as Monitoring, CRC, Bit Stuffing and Message frame check
  •  Loopback test for self-testing option
  •  Hot plug-in, automatic bit-rate detection support
  •  Programmable error threshold detection Configurable Message Buffering & Filtering
  •  Configurable Receive Buffers, Low-priority Transmit Buffers
  •  FIFO Mode and Priority Modes for Transmit Buffers Ease of Integration, Usage & Porting
  •  AMBA-AHB Standard Interface
  •  Optional Multi-CAN IP Wrapper for controlling multiple CAN IP Bus Nodes using a single host CAN IP Controller
  •  Easily can be ported to various FPGAs & ASIC Designs Compliance Check
  •  Multiple 3rd Party CAN IP2.0 Verification IP Protocol Compliance checked

Technical Specifications

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Semiconductor IP