Bus Decoders
Overview
Decoder logic controls numerous targets based on input from the initiator. It determines/decodes which target component will handle the current bus transaction. It also produces error messages for empty addresses in the hierarchy.
Key Features
- Supported Buses
- APB
- Flopped and non-flopped
- Integration third party IPs
- AHB
- Flopped and non-flopped
- Integration third party IPs
- AXI
- Flopped and non-flopped
- Integration third party IPs
- TileLink
- Flopped and non-flopped
- Integration third party IPs
Technical Specifications
Maturity
Released
Availability
Now