Async/HDLC Serial Channel
Overview
Full-featured asyn/hdlc serial channel
Key Features
- Async mode with optional address and parity bit
- HDLC mode with Flag generation, CRC and Abort capability
- Digital PLL and data encode/decode
- Four bytes of buffering for both receive and transmit
- IRDA mode
- Internal baud-rate divider
- DMA interface for both receive and transmit
- Standard byte-wide interface
Deliverables
- Verilog source
- optional testbench
Technical Specifications
Maturity
silicon-proven
Availability
now