ARC IoT Communications IP Subsystem

Key Features

Integrated, pre-verified hardware and software IP subsystem
ARC EM11D processor with DSP extensions delivers extremely low gate count and highly efficient processing performance
Hardware accelerators for key communications functions such as Viterbi decoding dramatically reduce cycle counts and energy consumption
Integrated peripherals provide a wide range of SoC connectivity options for SoC/MCUs
Digital Front End (DFE) tailored to efficiently connect to multiple partner RF transceivers
Communications library and optional software stacks provide NB-IoT application layers