9 track standard cell library at TSMC 55 nm
Overview
Foundry Sponsored, TSMC 55 uLPeF Sesame 9T a unique architecture based on 9-track cells, optimized for High Density and Low Dynamic Power allowing users to create faster SoC than with 7-track libraries.
Key Features
- Compromise for density and speed
- 9-Track high cells
- Only Metal 1 used for cell design
- Compatible with 1P3M SoC implementation
- with island construction kit
Technical Specifications
Maturity
Silicon_proven
Related IPs
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- 6 track Ultra High Density standard cell library at TSMC 180 nm
- 9 track standard cell library at TSMC 55 nm
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)