8-bit <=25GSa/s High-speed Low power ADC in 16nm TSMC CMOS

Overview

Key Features

• ADC with ultra-high sampling rate, low power, high BW, high ENOB
• Process technology: 16nm
• Resolution: 8 bit
• Sampling rate: 15 – 25 GSa/s (H variant)
• Programmable analogue input range: 0.5 – 1.7VPPDIFF
• Output clock @Fs/128 to digital core per channel
• Bandwidth (-3dB): 0.4*Fs
• Fully programmable and high performance fractional DPLL
• Available in single channel, IQ pair, 2x IQ pair and 4x IQ pair
• Fully specified for -5C to 100C operation
• APB control interface

Benefits

• Socionext has over 40 years’ experience and is a leader in state-of-the art system-on-chip technology and provides high performance SoC designs, serial transceiver technologies and advanced packaging solutions.
• Socionext combines specialist high-speed analogue, mixed-signal and digital designs having SoCs with large capacities, small sizes, and low power consumption through realization of 40nm, 28nm, 16nm and further advanced technologies.
• Therefore, in addition to IP offering , also total SoC (ASIC) solutions that include proven high-speed and large-pin-count package design, and verification can be supported/provided.
• IP and Base Technology for the most Advanced Digital Coherent SoCs including:
  • Low-power, high-speed ADC
  • Low-power, high-speed DAC
  • Low-power High-speed VSR/MR/LR SerDes (1–56 Gb/s)
  • Jitter Cleaning PLLs
  • Temperature Sensor

Applications

• Wireline/Optical Networking
• Wireless/Satellite Communication
• Antenna/Phased-Array Communication Sytems/MIMO
• Test & Measurement Equipment
• Industrial and Customer applications

Deliverables

• Documentation: Datasheet, User Guides, Test Report
• Hard Macro & integration support
• Abstract LEF and timing LIB files with constraints
• Behavioral Verilog model
• Example test bench
• Layout/Package guide

Technical Specifications