7 to 20 MHz Intermediate frequency amplifier

Overview

The device is a dual Intermediate-frequency amplifier (IFA) which consists of 4-stage amplifier with tunable gain, an input linear buffer for analog output and an analog-digital converter for digital output and a detector of output level.
The amplifier has differential inputs and outputs, and consists of 4 stages. Gain is sequentially reduced from the last stage to the first stage. This method allows to keep a low noise figure in wide gain range.
The amplifier can operate in the following modes:
- linear output with automatic gain control (AGC);
- digital output with AGC for analog signal;
- digital output with AGC for digital signal.
In the analog output mode the circuit retains a low output offset voltage and controls the gain so that the magnitude of the differential output signal is 200 mV peak-to-peak. DC offset compensation system operates both at an amplifier output signal and at a buffer output signal.
The block is fabricated on SMIC CMOS 0.18 um technology.

Key Features

  • SMIC CMOS 180 nm technology
  • Wide gain range (0…62 dB)
  • Low input noise figure
  • Low group delay time ripple vs. frequency and gain
  • Digital and analog output modes
  • Built-in AGC detector without external capacitor
  • No external components required
  • Portable to other technologies (upon request)

Applications

  • Receivers
  • Transceivers
  • Navigation systems

Deliverables

  • Schematic or NetList
  • Abstract model (.lef and .lib files)
  • Layout view (optional)
  • Behavioral model (Verilog)
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Technical Specifications

Foundry, Node
SMIC CMOS 180 nm
Maturity
Silicon proven
Availability
Now
SMIC
Silicon Proven: 180nm G
×
Semiconductor IP