5V ESD Clamp in GlobalFoundries 180nm LPe

Overview

A GlobalFoundries 180nm LPe Specialized 5V ESD Clamp.

A key attribute of this 5V Clamp is that it can be used for either signal protection or 1.8V power supplies. The clamp is a single cell, 44um x 32um in size. It is built from the substrate to metal 6. The clamp is very dense in metal, and diffusion, a wide area around the clamp (3um to 10um) should have minimum metals between layers 1 and 3, as well as little diffusion, to pass directly to chip top.

 Cell Names and Variation

Cell Name Description
ESD50_ggnmos Standard 5V Clamp


 Pin Out and Function

Parameter Description
PAD50 Signal/Power
VSS Ground
SUB SOI-Substrate


 Electrical Specifications

Parameter Description Min Typical Max Unit
Vm ax Max Voltage at PAD 50 -0.5 5 5.6 Volts
Il eak Leakage Current N/A 1.5 15 nA
Cm ax Load Capacitance N/A N/A 0.5 pF


 Metallization

  • PAD50 (Metal 4): Primary ESD current path. Robust connection, in wide thick metals and losts of vias, compliant with ESD.
  • VSS (Metal 4): Primary ESD current path. Robust connection, in wide thick metals and losts of vias, compliant with ESD
  • SUB (schematic only): There is no layout connection for SUB. This is the SUB connection inherent to whatever layout top level the clamp is placed into. The CDL netlit, however, has pin for it, and must connect to the SUB net of the top-level block the layout is placed in GROUND reference for ESD.

Block Diagram

5V ESD Clamp in GlobalFoundries 180nm LPe Block Diagram

Technical Specifications

Foundry, Node
GlobalFoundries 180nm LPe
GLOBALFOUNDRIES
Pre-Silicon: 180nm LP
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Semiconductor IP