55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process

Overview

NSCore's TwinBit(TM) is the only embedded CMOS, multi-time programmable (MTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to trap charge in the sidewall spacer of the gate.

TwinBit provides the benefits of Embedded Flash without the additional process cost in a secure, on-chip memory configuration qualified under automotive conditions. TwinBit IP is available for mainstream foundries as well as several undisclosed Japanese IDM's.

Please contact us to learn how our NVM IP can be used to replace EEPROM or ROM combined with on-chip SRAM for applications requiring high-security System-On-Chip.

Key Features

  • 1K-Time Programmable (MTP)
  • > 10 years retention
  • Uses standard CMOS process with no additional masks
  • 100% testable prior to programming
  • Includes comprehensive Built-in Self Test
  • Field or factory programmable
  • Operating temperature range -40C to 125C
  • 6V programming voltage, 1.2V+3.3V read voltage
  • Available sizes: 256Kb

Deliverables

  • Datasheets & Layout Guidelines
  • Behavioral Models (.v)
  • Timing Models (.lib)
  • Physical Models (.lef)
  • Layout Database (GDSII) & LVS Netlist

Technical Specifications

Foundry, Node
TSMC, 55nmnm
Maturity
Design-Kit Ready
Availability
Immediately
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Semiconductor IP