24bit Sigma-Delta Audio ADC

Overview

The IP is a stereo A/D Converter based on TSMC 90nm LP RF process with wide sampling rate of 8kHz ~ 96kHz. It is suitable for multimedia audio system which supports stereo line/FM input or mono microphone input.

Key Features

  • Process: TSMC 90nm 1.2v/3.3v 1P6M LP RF process (with 2.0fF/um^2 MIM cap)
  • Stereo 24-bit ??ADC
  • Single-ended Analog Input
  • Sampling Rate Ranging from 8kHz to 96kHz
  • Master Clock: 256fs
  • SNR: 96dB@1.8V for 48kHz
  • DR: 95dB@1.8V for 48kHz
  • Digital HPF for DC-Offset cancel
  • Power Supply: Analog power supply 2.6V ~ 3V ~3.6V, Digital power supply 1.08V~ 1.2V ~ 1.32V
  • Operated Ambient Temperature: Ta = -40 ~ 85°C
  • Operated Junction Temperature: Tj = -40~125°C

Block Diagram

24bit Sigma-Delta Audio ADC Block Diagram

Technical Specifications

Foundry, Node
TSMC 90nm 1.2v/3.3v 1P6M LP RF process (with 2.0fF/um^2 MIM cap)
Maturity
Available on request
Availability
Available
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Semiconductor IP