1Kx8 Bits OTP (One-Time Programmable) IP, TSMC 40ULP 1.1/2.5V Process

Overview

The ATO0001KX8TS040ULP5ZA is organized as 1 kb x 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSMC 40nm ULP 1.1V/2.5V Mixed-Signal, General Purpose process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming, configuration setting, feature selection, and PROM, etc.

Key Features

Fully compatible with standard TSMC 40nm ULP 1.1V / 2.5V CMOS process
Low voltage: VDD 1.1 V ± 10% read and VDDP 2.1 V ± 5% program
High speed program: 10-us single-bit programming
High speed read: 9-MHz read clock at 8-bit word.
Deep sleep mode by VDD off to save power consumption
Built-in test mode support
Asynchronous mode with output latches
Additional row to store any information
Operating temperature range: -40 °C to 125 °C for read and 10 °C to 40 °C for program

Benefits

Small IP size
Low program voltage/current
Low read voltage/current
High reliability
Silicon characterized and qualified

Deliverables

Datasheet
Verilog behavior model and test bench
Timing library
LEF File
Phantom GDSII database

Technical Specifications

Foundry, Node

TSMC 40ULP 1.1/2.5V Process

Maturity

Silicon Proven & In Production

Availability

Now

TSMC

Silicon Proven: 40nm LP

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