The 1G and 10G Switching Ethernet Subsystem dynamically switches an Ethernet Media Access Controller (MAC) between 1G or 10G physical coding sublayer/physical layer (PCS/PHY). The IP core is delivered as encrypted register transfer level (RTL) through the Vivado® Design Suite.
Targeted for Xilinx UltraScale+ devices. The Subsystem is included with the 10G/25G Ethernet MAC/PCS Subsystem.
1G/10G/25G Switching Ethernet Subsystem
Overview
Key Features
- Supports 1.25G or 10.3125G Ethernet
- Both media access control (MAC) and physical coding sublayer/physical medium attachment (PCS/PMA) functions are included
- Detailed statistics gathering
- Optional support for IEEE 1588 2-step hardware timestamping
Technical Specifications
Related IPs
- 10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications
- Ethernet PCS IP - Integrates MAC IP to a broad range of PHY and SerDes IP
- 400G/800G High Speed Ethernet Controller MAC/PCS/FEC
- 10G to 400G High Speed Channelized Ethernet Controller MAC/PCS/FEC
- 10-Gbit Ethernet MAC
- 1G to 200G High Speed Channelized Ethernet Controller MAC/PCS/FEC