150ns rising edge delay circuit, not trimmable

Overview

150ns rising edge delay circuit, bias current to C based, not trimmable

Technical Specifications

Foundry, Node
TSMC 180nm
Maturity
Silicon Verified
TSMC
Pre-Silicon: 180nm , 180nm E , 180nm ELL , 180nm FG , 180nm G , 180nm LP , 180nm LV , 180nm ULL
×
Semiconductor IP