FireCorerepresents the world’s only fully self-contained yet flexible IEEE1394 bus interface solution suite. With this exciting new product, DapTechnology combines essential IP building blocks for LLC IP (FireLinkTM) and PHY IP (FireGateTM) into one package. System designs can now entirely isolate the typical issues associated with off-the-shelf silicon (availability, roadmap, revisions) and have full control via in-field upgrades and optimization.
The advantages are obvious: Apart from having achieved new milestones for S1600 and S3200 transmission speeds, FireCoreTM offers a very customizable solution for both the Link as well as the PHY layer. Key elements include a configurable number of PHY ports, Bit Error Injection and Bit Error Rate Testing, a configurable host interface with DMA capability, optional features like Bus, Resource and Cycle Master capabilities, Expanded HW Filtering and isochronous data streaming ports.
With FireCore DapTechnology targets two main market segments, i.e. high bandwidth applications and AS5643 implementations which are predominantly deployed in aerospace and defense systems
Faster speeds (beyond 800 Mb/s) for FireWire have become a real need. The requirement predominantly originates from bandwidth rich applications in the video and audio arena. Even with the current industry standard of 800 Mb/s there are restrictions in the amount of video data that can be transmitted, especially when dealing with high-resolution, uncompressed video streams. While quite common and generally accepted in the consumer video arena (MPEG or DV video compression) in virtually all industrial, medical, scientific and avionics applications, lossy compression (e.g. JPEG) algorithms are not usable and the size of video data streams is constantly increasing. Likewise, the number of simultaneously transmitted streams is rising for typical applications. DapTechnology is firmly convinced that FireCoreTM is the only viable solution that offers a technological and economical roadmap for products in this domain and therefore presents a bright future for next generation vision-based products.
The other key area for value added deployments for FireCoreTM is the field of highly targeted applications. Usage of FireWire in the aerospace arena is probably the prime example. DapTechnology’s new FireCoreTM package offers unprecedented technical features and functions, added flexibility, options for customization and future expansion. The product not only addresses the earlier mentioned silicon availability and roadmap issues but furthermore, it offers a roadmap for AS5643 HW level support. Together with FireStackTM (DapTechnology’s own 1394 software stack), FireCoreTM is designed to take complete advantage of AS5643 extensions. It is the clear objective to fully abstract the 1394 protocol layer and largely the AS5643 protocol layer so the implementers can focus entirely on system level functions like fault tolerance, fault isolation and redundancy. For both FW components - FireLinkTM and FireGateTM - DapTechnology has very clear strategic visions as to how the company directly supports distinct features and functions for AS5643 and Mil1394. Both can be implemented as standalone solutions with remarkable advantages. In combination the two will offer the possibility to architect a system with measurable benefits.
1394B I/O
Overview
Key Features
- Single-chip solution: The PHY IP can be combined with Link Layer IPs, creating smaller solutions. Additional components can be added to create a System On Chip (SOC) solution.
- Flexible number of ports: Commercially available PHY chips have a fixed number of ports which for small peripherals is often overkill. On the other hand, host adapter would likely benefit from 3 or more ports and a hub could even have more than that. For a PHY based on FPGA technology, the user can customize the number of ports as required.
- Optional debug and test features: Optionally the user can include debug and test features like BERT (Bit Error Rate Test) Low level data monitoring and recording
- Field-upgradable: The used FPGAs are field upgradable thus allowing the addition new features or bug fixes, even if the device is already in the field.
- Cost effective ASICS: Once a design is finalized an IP solution offers a very cost effective path to spinning a custom ASIC.
Technical Specifications
Availability
Now
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