12-bit 40nm 1.1V 320MHz Digitally-Assisted Current DAC

Overview

The TRV201TSM40LP IP is a 1.1V low-power low-silicon-area 12-bit 320MHz Digitally-Assisted Current-DAC implemented in TSMC Low-Power 40nm CMOS process technology. Its 160MHz Nyquist bandwidth makes it especially suitable for use in carrier-aggregated wireless communication integrated circuit subsystems (LTE, WiFi, WiMAX etc).

Key Features

  • Programmable Full-Scale Output Current
  • Scalable Power Consumption
  • Configurable Randomiser Algorithms
  • Return-to-Zero Mode
  • Selectable Two's Complement or Offset-binary data input
  • 65dB SNR

Benefits

  • Low-power and low-area fully-featured 12-bit DAC with programmable full-scale output current and integrated signal processing and randomisation logic.

Block Diagram

12-bit 40nm 1.1V 320MHz Digitally-Assisted Current DAC Block Diagram

Applications

  • DAC is suitable for embedding in ASIC and SoC subsystems for:
  • LTE, WiFi, WiMAX and many more applications

Deliverables

  • Behavioural Models
  • Timing Models
  • GDSII Layout Database
  • Netlist for LVS verification
  • Usage and Integration Guidelines
  • Databook

Technical Specifications

Foundry, Node
TSMC 40nm CMOS
Maturity
Contact Tetrivis
Availability
GDSII available in January 2015
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Semiconductor IP