110nm BCD process Synchronous High-Density Single-Port SRAM Compiler
Overview
110nm BCD process Synchronous High-Density Single-Port SRAM Compiler
Technical Specifications
Foundry, Node
UMC 0.11um PMIC BCD
Related IPs
- VeriSilicon SMIC 0.13umLL 1P3M High-Density Synchronous Single-Port SRAM compiler, Memory Array Range:128 to 512K Bits
- Silterra 0.11um High Density Single-Port SRAM Compiler
- Samsung 28nm Low Power Single-Port SRAM Compiler
- Samsung 28nm Low Voltage Single-Port SRAM Compiler
- Silterra 0.13Z 1.5v High Density Single-Port SRAM Compiler
- GLOBALFOUNDRIES 22nm Low Power Single-Port SRAM Compiler