10-bit 1-channel constant power DAC

Overview

10-bit constant power DAC employs a current steering DAC architecture with control loop, which adjusts DAC input code to keep power dissipated in terminator constant. The block is easy to configure and operate, combining good accuracy and linearity. Several operation modes are available: constant power DAC, current DAC with output voltage monitoring, current DAC (manual mode), low-speed ADC. Output DAC current could be fed to one of two DAC outputs (DAC_OUT0 or DAC_OUT1) depending on Out_sel input.

Key Features

  • iHP SiGe BiCMOS 0.25 um
  • Single 2.5 V supply voltage
  • 22 mA full scale output current
  • 0°C to 100°C operation
  • 4 active operation modes
  • Standby mode

Applications

  • Supply voltage stabilization systems
  • Measurement and calibration systems

Deliverables

  • Schematic or NetList
  • Abstract model (.lef and .lib files)
  • Layout view (optional)
  • Behavioral model (Verilog)
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Technical Specifications

Foundry, Node
iHP SiGe BiCMOS 0.25 um
Maturity
pre-silicon verification
Availability
Now
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Semiconductor IP