1-Port Register File Compiler GF22FDX Low Power
Overview
Silicon proven 1-Port Register File SRAM compiler for GF22 FDX - Memory optimized for low power and supports body biasing.
Key Features
- Optimized power supply solution
- Active usage of body bias to achieve optimal power and performance
- Dual rail operation
- Logic: 0.65 V +/-10% or 0.8 V +/-10%
- Array: 0.8 V +/-10%
- FD-SOI optimized
- Tunable performance: power/speed optimization through adaptive or pre-set body biasing
- Leakage is lowered due to insulator layer
- Lower variability across die due to lower doping effort
- Optimized Architecture
- Several low power modes for optimized saving
- Flexible integration
- Fully functional without Body Biasing
- Compatible with any Body Biasing generator
- Other Features
- Embedded retention and shut-down switches
- Variable Write Mask
- Energy Efficient Solution for GF 22nm FDX®
- Compatible with Industry Adaptive Body Biasing IP
- Body Biasing functionality (-2.0 V /+2.0 V) to reduce
- leakage at the same supply level
- Part of the Silvaco GF 22nm FDX®-PLUS IP portfolio
Block Diagram
Technical Specifications
Foundry, Node
GLOBALFOUNDRIES 22FDX
Maturity
In Production
Availability
Now
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