1.8V GPIO: 3.3V Tolerant

Overview

The 1.8V Fault-Tolerant General Purpose I/O library provides a 3.3V tolerant programmable, bidirectional I/O that give the system designer the flexibility to design to a wide range of performance targets. This library is offered as a supplement to the I/O libraries provided by Aragio Solutions. Use of this library also requires the Support: Power library to enable the construction of a complete pad ring. Ported from our TSMC 16 silicon proven design.

Key Features

  • • High performance, programmable general purpose I/O cell
  • 3.3V tolerant only @ VDVDD = 1.8V
  • Fault tolerant @ PAD = 3.3V
  • • Staggered CUP wire bond implementation with flip chip option
  • • Power supply sequencing independent design with Power-On Control
  • • Robust ESD Protection
  • 2KV ESD Human Body Model (HBM)
  • ? Compliant with ANSI/ESDA/JEDEC JS-001-2017 (December 8, 2016)
  • 500V ESD Charge Device Model (CDM)
  • ? Compliant with JESD22-C101F (October 2013)
  • • Latch-up Immunity
  • Compliant with JESD78E (April 2016)
  • Tested using I-Test criteria of ±100mA at maximum ambient temperature of +125°C.

Deliverables

  • a. Physical abstract in LEF format (.lef)
  • b. Timing models in Synopsys Liberty formats (.lib and .db)
  • c. Calibre compatible LVS netlist in CDL format (.cdl)
  • d. GDSII stream (.gds)
  • e. Behavioral Verilog (.v)
  • f. Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
  • g. Databook (.pdf)
  • h. Library User Guide - ESD Guidelines (.pdf)

Technical Specifications

Foundry, Node
TSMC 16nm
Maturity
Silicon Proven
Availability
Available Now
TSMC
Silicon Proven: 16nm
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Semiconductor IP