1.8V/3.3V Switchable GPIO with I2C, HDMI, LVDS, ESD & Analog in TSMC 28nm

Overview

A TSMC 28nm HPM/HPC/HPC+ Wirebond I/O Library with a switchable 1.8V/3.3V GPIO, 5V I2C ODIO, 1.8V & 3.3V Analog Cells, ESD and more.

A key attribute of this silicon-proven library is to detect and adjust to a VDDIO supply of 1.8V or 3.3V during system operation. The GPIO can be configured as input, output, open-source, or open-drain with an optional 60kohm pull-up or pull-down resistor. Digital cells for 25MHz, 75MHz, and 150MHz allow optimization across SSO currents & power. Cells for I/O, core power & ground with built-in ESD circuitry are included. The library also features 5V I2C ODIO (fail-safe), 5V OTP cell, and 1.8V & 3.3V Analog cells with ESD protection. The library also includes 1.8V LVDS, 3.3V & 5V tolerant HDMI protection blocks with low-cap signal pads. The library’s filler, transition, and break cells allow for flexible pad ring construction. The library meets 2kV HBM, 500V CDM, and 2kV IEC 61000-4-2 standards.

Operating Conditions

Parameter Value
VDDIO 1.8V or 3.3V
Core 0.9V
VREF 1.8V
Tj -40C to 125C
Max Load 50pF (10pF at speed)

Cell Size and Metal Stack

Cell Size Metal Stack WB Pitch
55x75um 6M_4x1z 55um single
25x130um 7M_5x1z 25um dual
25x130um 9M_6x2z 25um dual
20x186um 9M_6x2z 20um triple

Cell Summary

Cell Type Feature
Supply/ESD 1.8V/3.3V; 1.8V; 0.9V; GND
GPIO 25, 75, 150MHz, fail-safe
I2C ODIO2 5V, fail-safe
HDMI 3.3V, 5V tolerant, fail-safe
LVDS 1.8V
Analog 1.8V & 3.3V
OTP 5V programming gate-cell
Break cells VDDIO, VDD, VSS
Filler cells 1um, 5um
Transition Bridge to TSMC I/Os

Key Features

  • Multi-voltage, 1.8V/3.3V, operation
  • 25MHz, 75Mhz, & 150MHz GPIO speed options
  • Full-speed output enable
  • Indepedent power sequencing
  • Shorted output protection
  • Schmitt trigger receiver
  • 60Kohm selectable pull-up or pull-down resistor
  • ESD: 2kV HBM, 500V CDM, 2kV IEC 61000-4-2

Block Diagram

1.8V/3.3V Switchable GPIO with I2C, HDMI, LVDS, ESD & Analog in TSMC 28nm Block Diagram

Deliverables

  • GDS
  • CDL netlist
  • Verilog stub
  • Verilog behavioral model
  • LEF
  • Liberty Timing Files
  • IBIS (option)
  • Electrical datasheet
  • User guide and application notes
  • Consulting and Support

Technical Specifications

Foundry, Node
TSMC 28nm
TSMC
Pre-Silicon: 16nm
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Semiconductor IP